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Homepage>BS Standards>35 INFORMATION TECHNOLOGY. OFFICE MACHINES>35.160 Microprocessor systems>BS ISO/IEC 10861:1994 Information technology. Microprocessor systems. High-performance synchronous 32-bit bus: MULTIBUS II
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immediate downloadReleased: 1995-07-15
BS ISO/IEC 10861:1994 Information technology. Microprocessor systems. High-performance synchronous 32-bit bus: MULTIBUS II

BS ISO/IEC 10861:1994

Information technology. Microprocessor systems. High-performance synchronous 32-bit bus: MULTIBUS II

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Standard number:BS ISO/IEC 10861:1994
Pages:136
Released:1995-07-15
ISBN:0 580 24377 X
Status:Standard
DESCRIPTION

BS ISO/IEC 10861:1994


This standard BS ISO/IEC 10861:1994 Information technology. Microprocessor systems. High-performance synchronous 32-bit bus: MULTIBUS II is classified in these ICS categories:
  • 35.160 Microprocessor systems

This International Standard defines the operation, functions, and attributes of the IEEE 1296 bus standard.

  1. This standard defines a high-performance 32-bit synchronous bus standard.

  2. The bus standard must have a design-in lifetime of 10 years with backward compatibility.

  3. The standard is intended for general purpose applications to optimize block transfers, including protocol for message passing. For real-time applications, the bus will provide a means of ensuring an upper limit to message delivery time.

  4. The standard is intended to be compatible with existing IEC mechanical standards (IEC Pub 297-1,1 297-3, and 603-2) with recognition of the need for special front panels to address ESD, EMI, and RFI requirements.

  5. Options within the standard will be clearly identified.

  6. The standard is intended to support multiple processor modules in a functionally partitioned configuration and heterogeneous processor types in the same system.

  7. The standard is intended to support heterogeneous processor types in the same system.

  8. Message-passing format and protocol is intended for future migration to a serial system bus.