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download between 0-24 hoursReleased: 2018-11-28
IEC 63011-1:2018
Integrated circuits - Three dimensional integrated circuits - Part 1: Terminology
Circuits intégrés - Circuits intégrés tridimensionnels - Partie 1 : Terminologie
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English/French - Bilingual PDF
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English/French - Bilingual Hardcopy
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Standard number: | IEC 63011-1:2018 |
Released: | 2018-11-28 |
Language: | English/French - Bilingual |
DESCRIPTION
IEC 63011-1:2018
IEC 63011-1:2018 provides definitions pertaining to multichip integrated circuits, as vertically stacked dies using through-silicon vias (TSVs) or micro bumps. Terms and definitions related to the fabrication and test of the multichip integrated circuits are also provided.